| Description |
1 online resource |
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text txt rdacontent |
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computer c rdamedia |
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online resource cr rdacarrier |
| Series |
The Morgan Kaufmann series in systems on silicon |
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Morgan Kaufmann series in systems on silicon.
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| Summary |
This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI practitioners and researchers in need of fluency in an "adjacent" field will find this an invaluable reference to the basic EDA concepts, principles, data structures, algorithms, and architectures for the design, verification, and test of VLSI circuits. Anyone who needs to learn the concepts, principles, data structures, algorithms, and architectures of the EDA flow will benefit from this book. Covers complete spectrum of the EDA flow, from ESL design modeling to logic/test synthesis, verification, physical design, and test - helps EDA newcomers to get "up-and-running" quickly Includes comprehensive coverage of EDA concepts, principles, data structures, algorithms, and architectures - helps all readers improve their VLSI design competence Contains latest advancements not yet available in other books, including Test compression, ESL design modeling, large-scale floorplanning, placement, routing, synthesis of clock and power/ground networks - helps readers to design/develop testable chips or products Includes industry best-practices wherever appropriate in most chapters - helps readers avoid costly mistakes |
| Contents |
Ch. 1. Introduction / Charles E. Stroud, Lang-Terng Wang and Yao-Wen Chang -- Ch. 2. Fundamentals of CMOS design / Xinghao Chen and Nur A. Touba -- Ch. 3. Design for testability / Laung-Terng Wang -- Ch. 4. Fundamentals of algorithms / Chung-Yang Huang, Chao-Yue Lai and Kwang-Ting Cheng -- Ch. 5. Electronic system-level design and high-level synthesis / Jianwen Zhu and Nikil Dutt -- Ch. 6. Logic synthesis in a nutshell / Jie-Hong Jiang and Srinivas Devadas -- Ch. 7. Test synthesis / Laung-Terng Wang, Xiaoqing Wen and Shianling Wu -- Ch. 8. Logic and circuit simulation / Jiun-Lang Huang, Cheng-Kok Koh and Stephen F. Cauley -- Ch. 9. Functional verification / Hung-Pin Wen, Li-C. Wang and Kwang-Ting Cheng -- Ch. 10. Floorplanning / Tung-Chieh Chen and Yao-Wen Chang -- Ch. 11. Placement / Chris Chu -- Ch. 12. Global and detailed routing / Huang-Yu Chen and Yao-Wen Chang -- Ch. 13. Synthesis of clock ad power/ground networks / Cheng-Kok Koh, Jitesh Jain and Stephen F. Cauley. |
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Ch. 14. Fault Simulation and Test Generation / James C.-M. Li and Michael S. Hsiao. |
| Note |
Print version record. |
| Bibliography |
Includes bibliographical references and index. |
| Subject |
Electronic circuit design -- Data processing.
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Computer-aided design.
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Computer-Aided Design |
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Conception assistée par ordinateur.
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computer-aided designs (visual works)
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computer-aided design (process)
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Computer-aided design
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Electronic circuit design -- Data processing
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| Added Author |
Wang, Laung-Terng.
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Chang, Yao-Wen.
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Cheng, Kwang-Ting, 1961-
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| Other Form: |
Print version: Electronic design automation. Burlington, MA : Morgan Kaufmann Publishers/Elsevier, 2009 9780123743640 0123743648 (DLC) 2008041788 (OCoLC)352339170 |
| ISBN |
9780123743640 (hardcover) |
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0123743648 (hardcover) |
| Standard No. |
AU@ 000045964135 |
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AU@ 000048788530 |
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CHNEW 001009513 |
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DEBBG BV040900666 |
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DEBBG BV042300669 |
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DEBSZ 367744694 |
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DEBSZ 378275674 |
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DEBSZ 381366944 |
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GBVCP 78536269X |
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NZ1 15187728 |
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NZ1 15619873 |
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AU@ 000060881554 |
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