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Author Mishra, Sanjeeb, author.

Title System on chip interfaces for low power design / Sanjeeb Mishra, Neeraj Kumar Singh, Vijayakrishnan Rousseau.

Publication Info. Amsterdam : Morgan Kaufmann is an imprint of Elsevier, [2016]
©2016

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Location Call No. OPAC Message Status
 Axe Elsevier ScienceDirect Ebook  Electronic Book    ---  Available
Description 1 online resource
text txt rdacontent
computer c rdamedia
online resource cr rdacarrier
Note Online resource; title from PDF title page (EBSCO, viewed November 23, 2015)
Bibliography Includes bibliographical references and index.
Contents Front Cover; System on Chip Interfaces for Low Power Design; Copyright; Copyright Permissions; Dedication; Contents; Acknowledgments; Chapter 1: SoC Design Fundamentals and Evolution; Introduction; Typical system components; Categorization of computer systems; System approach to design; Hardware software co-design; System design methodologies; System on board; Advantages of SoB; Disadvantages of SoB; System on chip; Advantages of SoC; Disadvantages of SoC; System in a package; Advantages of SiP; Disadvantages of SiP; Application-specific integrated circuit; Advantages of ASIC.
Disadvantages of ASICSystem on programmable chip; Advantage of SoPC; Disadvantage of SoPC; System design trends; Hardware IC design fundamentals; Chip design tradeoff; Chapter 2: Understanding Power Consumption Fundamentals; Why power optimization is important; Power consumption in IC; Static power; Leakage power; Standby power; Dynamic power; Power optimization in IC; Power consumption of a system; Power optimization at the system level; Active power management; Idle power management; Connected standby power management; ACPI states; Global and system states; Device states; Processor states.
Chapter 3: Generic SoC Architecture ComponentsGeneric SoC Block Diagram; Subsystems of an SoC; CPU; Instruction set architecture; ISA category; Endianness; Performance; Bus, fabric, and interconnect; Display; Multimedia; Audio; Graphics; Imaging; Communication; Bluetooth; Wi-Fi/wireless LAN; Mobile telecommunication standards: 2G/3G/4G/LTE; GPS; FM; Near field communication; Memory; Volatile memory; Nonvolatile memory; Volatile versus nonvolatile memory; Security; Power; Power delivery; Power management; Battery charging; Sensor interfaces; Input devices; Debug interfaces; Conclusion.
Chapter 4: Display InterfacesGeneric Display Concepts; Display Interface Overview; Extended Display Identification Data (EDID) and Display Data Channel (DDC); Extended Display Identification Data; Display Data Channel; Presence detect; Display Interface Classification; External Display Interface; Video Graphics Array (VGA); Digital Visual Interface (DVI); Parallel digital display interface; Serial digital display interface; Differential signaling-Why it is important; Transition-minimized differential signaling; DVI TMDS link architecture; High-Definition Multimedia Interface (HDMI)
Data encoding and packetizationAudio basics; Audio data transmission over video blanking; Audio clock regeneration; Audio data delivery rate; Infoframes; HDMI connector; DisplayPort (DP); Main link operation; AUX channel operation; Link training; Link operation; Micro packets-Transfer units; Secondary streams; Audio transmission without video; Other uses of HPD; DP connector; Internal Display Interface; Overview; LCD operation; Panel power sequence; Panel power saving; Backlight power reduction; Remote frame buffer; Low Voltage Differential Signaling (LVDS); LVDS panel power sequencing.
Language English.
Subject Systems on a chip.
Low voltage integrated circuits -- Design and construction.
Systèmes sur une puce.
COMPUTERS -- Computer Literacy.
COMPUTERS -- Computer Science.
COMPUTERS -- Data Processing.
COMPUTERS -- Hardware -- General.
COMPUTERS -- Information Technology.
COMPUTERS -- Machine Theory.
COMPUTERS -- Reference.
Low voltage integrated circuits -- Design and construction
Systems on a chip
Added Author Singh, Neeraj Kumar, author.
Rousseau, Vijayakrishnan, author.
Other Form: Print version: Mishra, Sanjeeb. System on chip interfaces for low power design. Amsterdam : Morgan Kaufmann is an imprint of Elsevier, [2016] (DLC) 2015951711
ISBN 9780128017906 (electronic bk.)
0128017902 (electronic bk.)
0128016302
9780128016305
9780128016305
Standard No. 99965986752
AU@ 000057174463
CHBIS 010796119
CHNEW 001013249
CHVBK 403949386
GBVCP 856733091

 
    
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