| Edition |
2nd ed. / contributing authors, Wayne M. Cardoza [and others]. |
| Description |
1 online resource (1 volume (various pagings)) |
|
text txt rdacontent |
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computer c rdamedia |
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online resource cr rdacarrier |
| Access |
Use copy Restrictions unspecified star MiAaHDL |
| Reproduction |
Electronic reproduction. [Place of publication not identified] : HathiTrust Digital Library, 2010. MiAaHDL |
| System Details |
Master and use copy. Digital master created according to Benchmark for Faithful Digital Reproductions of Monographs and Serials, Version 1. Digital Library Federation, December 2002. http://purl.oclc.org/DLF/benchrepro0212 MiAaHDL |
| Processing Action |
digitized 2010 HathiTrust Digital Library committed to preserve pda MiAaHDL |
| Note |
Print version record. |
| Summary |
Alpha AXP Architecture Reference Manual. |
| Contents |
Front Cover; Alpha Axp Architecture Reference Manual; Copyright Page; Table of Contents; FOREWORD; Preface to the First Edition; Preface to the Second Edition; Part 1: Common Architecture (I); Chapter 1. Introduction (I); 1.1 The Alpha AXP Approach to RISC Architecture; 1.2 Data Format Overview; 1.3 Instruction Format Overview; 1.4 Instruction Overview; 1.5 Instruction Set Characteristics; 1.6 Terminology and Conventions; Chapter 2. Basic Architecture (I); 2.1 Addressing; 2.2 Data Types; 2.3 Big-endian Addressing Support; Chapter 3. Instruction Formats (I); 3.1 Alpha AXP Registers. |
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3.2 Notation3.3 Instruction Formats; Chapter 4. Instruction Descriptions (I); 4.1 Instruction Set Overview; 4.2 Memory Integer Load/Store Instructions; 4.3 Control Instructions; 4.4 Integer Arithmetic Instructions; 4.5 Logical and Shift Instructions; 4.6 Byte-Manipulation Instructions; 4.7 Floating-Point Instructions; 4.8 Memory Format Floating-Point Instructions; 4.9 Branch Format Floating-Point Instructions; 4.10 Floating-Point Operate Format Instructions; 4.11 Miscellaneous Instructions; 4.12 VAX Compatibility Instructions; Chapter 5. System Architecture and Programming Implications. |
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5.1 Introduction5.2 Physical Address Space Characteristics; 5.3 Translation Buffers and Virtual Caches; 5.4 Caches and Write Buffers; 5.5 Data Sharing; 5.6 Read/Write Ordering; 5.7 Arithmetic Traps; Chapter 6. Common PALcode Architecture (I); 6.1 PALcode; 6.2 PALcode Instructions and Functions; 6.3 PALcode Environment; 6.4 Special Functions Required for PALcode; 6.5 PALcode Effects on System Code; 6.6 PALcode Replacement; 6.7 Required PALcode Instructions; Chapter 7. Console Subsystem Overview (I); Chapter 8. Input/Output Overview (I); Specific Operating System PALcode Architecture (II). |
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Part 2: OpenVMS AXP Software (ll-A)Chapter 1. Introduction to OpenVMS AXP (II-A); 1.1 Register Usage; Chapter 2. OpenVMS AXP PALcode Instruction Descriptions (ll-A); 2.1 Unprivileged General OpenVMS AXP PALcode Instructions; 2.2 OpenVMS AXP Queue Data Types; 2.3 Unprivileged OpenVMS AXP Queue PALcode Instructions; 2.4 Unprivileged VAX Compatibility PALcode Instructions; 2.5 Unprivileged PALcode Thread Instructions; 2.6 Privileged PALcode Instructions; Chapter 3. OpenVMS AXP Memory Management (II-A); 3.1 Introduction; 3.2 Virtual Address Space; 3.3 Physical Address Space. |
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3.4 Memory Management Control3.5 Page Table Entries; 3.6 Memory Protection; 3.7 Address Translation; 3.8 Translation Buffer; 3.9 Address Space Numbers; 3.10 Memory Management Faults; Chapter 4. OpenVMS AXP Process Structure (II-A); 4.1 Process Definition; 4.2 Hardware Privileged Process Context; 4.3 Asynchronous System Traps (AST); 4.4 Process Context Switching; Chapter 5. OpenVMS AXP Internal Processor Registers (ll-A); 5.1 Internal Processor Registers; 5.1 Internal Processor Registers; 5.2 Stack Pointer Internal Processor Registers; 5.3 IPR Summary. |
| Subject |
Computer architecture.
|
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Reduced instruction set computers.
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Ordinateurs -- Architecture.
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Ordinateurs à jeu d'instructions réduit.
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COMPUTERS -- Computer Literacy.
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COMPUTERS -- Computer Science.
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COMPUTERS -- Data Processing.
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COMPUTERS -- Hardware -- General.
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COMPUTERS -- Information Technology.
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COMPUTERS -- Machine Theory.
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COMPUTERS -- Reference.
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Computer architecture
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Reduced instruction set computers
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| Added Author |
Witek, Richard.
|
| Added Title |
Alpha architecture reference manual.
|
| Other Form: |
Print version: Sites, Richard L. Alpha AXP architecture reference manual. 2nd ed. Boston : Digital Press, ©1995 (DLC) 95022578 (OCoLC)32625680 |
| ISBN |
9781483184036 (electronic bk.) |
|
148318403X (electronic bk.) |
|
1555581455 (acidfree paper) |
|
9781555581459 (acidfree paper) |
| Standard No. |
AU@ 000055735644 |
|
CHNEW 000712320 |
|
CHNEW 000889863 |
|
CHVBK 37448581X |
|
DEBBG BV043616587 |
|
DEBSZ 431882894 |
|
DEBSZ 449478491 |
|
NZ1 15918589 |
