| Description |
1 online resource : color illustrations |
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text txt rdacontent |
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computer c rdamedia |
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online resource cr rdacarrier |
| Bibliography |
Includes bibliographical references and index. |
| Note |
Online resource; title from PDF title page (EBSCO, viewed December 15, 2017). |
| Summary |
This book takes a practical hands-on approach to developing low complexity algorithms and transforming them into working hardware. It follows a complete design approach - from algorithms to hardware architectures - and addresses some of the challenges associated with their design, providing insight into implementing innovative architectures based on low complexity algorithms. The reader will learn: Modern techniques to design, model and analyze low complexity LDPC algorithms as well as their hardware implementationHow to reduce computational complexity and power consumption using computer aided design techniquesAll aspects of the design spectrum from algorithms to hardware implementation and performance trade-offs. |
| Contents |
Introduction -- Overview of LDPC codes -- Structure and flexibility of LDPC codes -- LDPC decoding algorithms -- LDPC decoder architectures -- Hardware implementation of LDPC decoders -- LDPC decoders in multimedia communication -- Prospective LDPC applications. |
| Subject |
Decoders (Electronics)
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Digital communications.
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Décodeurs (Électronique)
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Transmission numérique.
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TECHNOLOGY & ENGINEERING -- Mechanical.
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Decoders (Electronics)
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Digital communications
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| Added Author |
Aziz, Syed Mahfuzul, author.
|
| Other Form: |
Print version: Chandrasetty, Vikram Arkalgud. Resource efficient LDPC decoders. London : Academic Press, an imprint of Elsevier, [2018] (DLC) 2017962394 |
| ISBN |
9780128112564 (electronic bk.) |
|
0128112565 (electronic bk.) |
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0128112557 |
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9780128112557 |
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9780128112557 |
| Standard No. |
AU@ 000061498392 |
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AU@ 000063693577 |
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AU@ 000068128264 |
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CHNEW 001014677 |
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