Edition |
First edition. |
Description |
1 online resource (xiv, 356 pages) : illustrations (some colour) |
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text txt rdacontent |
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computer c rdamedia |
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online resource cr rdacarrier |
Series |
Advances in computers, 0065-2458 ; volume 124 |
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Advances in computers ; v. 124.
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Bibliography |
Includes bibliographical references. |
Summary |
"Advances in Computers, Volume 124 presents updates on innovations in computer hardware, software, theory, design and applications, with this updated volume including new chapters on Traffic-Load-Aware Virtual Channel Power-gating in Network-on-Chips, An Efficient DVS Scheme for On-chip Networks, A Power-Performance Balanced Network-on-Chip for Mixed CPU-GPU Systems, Routerless Networks-on-Chip, Routing Algorithm Design for Power- and Temperature-Aware NoCs, Approximate Communication for Energy-Efficient Network-on-Chip, Power-Efficient NoC Design by Partial Topology Reconfiguration, The Design of a Deflection-based Energy-efficient On-chip Network, and Power-Gating in Networks-on-Chip."--Publisher's web page, viewed February 4, 2022 |
Note |
Online resource; title from publisher's web page (ScienceDirect, viewed February 4, 2022) |
Subject |
Computer science.
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Networks on a chip.
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Electronic Data Processing |
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Informatique.
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Réseaux sur puce.
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Computer science
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Networks on a chip
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Added Author |
Hurson, A. R., editor.
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Sarbazi-Azad, Hamid, editor.
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Other Form: |
Print version: Power-efficient network-on-chips : design and evaluation. First edition. Elsevier Academic Press, 2022 9780323856881 (OCoLC)1289264657 |
ISBN |
9780323856898 (eBook) |
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0323856896 |
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9780323856881 (hardcover) |
Standard No. |
AU@ 000071283318 |
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