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Author Harris, David (David Lewis)

Title Skew-tolerant circuit design / David Harris.

Imprint San Francisco : Morgan Kaufmann Publishers, 2001.


Location Call No. OPAC Message Status
 Axe Books 24x7 Engineering E-Book  Electronic Book    ---  Available
Description 1 online resource (xiv, 223 pages) : illustrations.
text txt rdacontent
computer c rdamedia
online resource cr rdacarrier
Series Morgan Kaufmann series in computer architecture and design
Morgan Kaufmann series in computer architecture and design.
Bibliography Includes bibliographical references and index.
Note Print version record.
Contents Chapter 1 -- Introduction -- Chapter 2 -- Fundamental Concepts -- Chapter 3 -- IP Switching -- Chapter 4 -- Tag Switching -- Chapter 5 -- MPLS Core Protocols -- Chapter 6 -- Quality of Service -- Chapter 7 -- ConstraintUbased routing -- Chapter 8 -- Virtual Private Networks.
Summary As advances in technology and circuit design boost operating frequencies of microprocessors, DSPs and other fast chips, new design challenges continue to emerge. One of the major performance limitations in today's chip designs is clock skew, the uncertainty in arrival times between a pair of clocks. Increasing clock frequencies are forcing many engineers to rethink their timing budgets and to use skew-tolerant circuit techniques for both domino and static circuits. While senior designers have long developed their own techniques for reducing the sequencing overhead of domino circuits, this knowledge has routinely been protected as trade secret and has rarely been shared. Skew-Tolerant Circuit Design presents a systematic way of achieving the same goal and puts it in the hands of all designers. This book clearly presents skew-tolerant techniques and shows how they address the challenges of clocking, latching, and clock skew. It provides the practicing circuit designer with a clearly detailed tutorial and an insightful summary of the most recent literature on these critical clock skew issues. * Synthesizes the most recent advances in skew-tolerant design in one cohesive tutorial * Provides incisive instruction and advice punctuated by humorous illustrations * Includes exercises to test understanding of key concepts and solutions to selected exercises.
Subject Timing circuits -- Design and construction.
Integrated circuits -- Very large scale integration -- Design and construction.
TECHNOLOGY & ENGINEERING -- Electronics -- Circuits -- Integrated.
TECHNOLOGY & ENGINEERING -- Electronics -- Circuits -- General.
Integrated circuits -- Very large scale integration -- Design and construction. (OCoLC)fst00975610
Synchronization. (OCoLC)fst01141085
Timing circuits -- Design and construction. (OCoLC)fst01151227
Genre/Form Electronic books.
Electronic book.
Other Form: Print version: Harris, David (David Lewis). Skew-tolerant circuit design. San Francisco : Morgan Kaufmann Publishers, 2001 (DLC) 00036538
ISBN 9780080541266 (electronic bk.)
0080541267 (electronic bk.)
Standard No. AU@ 000051555105
CHNEW 001009756
CHVBK 519242378
DEBBG BV041783499
DEBBG BV042307764
DEBBG BV043045094
DEBSZ 367756935
DEBSZ 404331866
DEBSZ 422169366
NZ1 12435522

Available items only