| Edition |
2nd ed. |
| Description |
1 online resource (xix, 492 pages) : illustrations |
|
text txt rdacontent |
|
computer c rdamedia |
|
online resource cr rdacarrier |
| Summary |
This second edition is not only a thorough update of the first edition, it is also a marriage of the best-known RISC architecture--MIPS--with the best-known open-source OS--Linux. The first part of the book begins with MIPS design principles and then describes the MIPS instruction set and programmers resources. It uses the MIPS32 standard as a baseline (the 1st edition used the R3000) from which to compare all other versions of the architecture and assumes that MIPS64 is the main option. The second part is a significant change from the first edition. It provides concrete examples of operating system low level code, by using Linux as the example operating system. It describes how Linux is built on the foundations the MIPS hardware provides and summarizes the Linux application environment, describing the libraries, kernel device-drivers and CPU-specific code. It then digs deep into application code and library support, protection and memory management, interrupts in the Linux kernel and multiprocessor Linux. Sweetman has revised his best-selling MIPS bible for MIPS programmers, embedded systems designers, developers and programmers, who need an in-depth understanding of the MIPS architecture and specific guidance for writing software for MIPS-based systems, which are increasingly Linux-based. * Completely new material offers the best explanation available on how Linux runs on real hardware. * Provides a complete, updated and easy-to-use guide to the MIPS instruction set using the MIPS32 standard as the baseline architecture with the MIPS64 as the main option. * Retains the same engaging writing style that made the first edition so readable, reflecting the authors 20+ years experience in designing systems based on the MIPS architecture. |
| Contents |
Chapter 1: RISCs and MIPS -- Chapter 2: MIPS Architecture -- Chapter 3: Coprocessor 0: MIPS Processor Control -- Chapter 4: How Caches work on MIPS -- Chapter 5: Exceptions, Interrupts, and Initialization -- Chapter 6: Low-level Memory Management and the TLB -- Chapter 7: Floating-Point Support -- Chapter 8: Complete Guide to the MIPS Instruction Set -- Chapter 9: Reading MIPS Assembler Language -- Chapter 10: Porting Software to MIPS -- Chapter 11: MIPS Software Standards (ABIs) -- Chapter 12: Debugging MIPS -- debug and profiling features -- Chapter 13: GNU/Linux from Eight Miles High -- Chapter 14: How hardware and software work together -- Chapter 15: MIPS-specific issues in the Linux kernel -- Chapter 16: Linux Application Code, PIC and Libraries -- Appendix A: MIPS Multithreading -- Appendix B: Other Optional extensions to the MIPS instruction set -- MIPS Glossary. |
| Bibliography |
Includes bibliographical references (pages 477-479) and index. |
| Note |
Print version record. |
| Subject |
Linux.
|
|
MIPS (Computer architecture)
|
|
RISC microprocessors.
|
|
Embedded computer systems -- Programming.
|
|
MIPS (Architecture d'ordinateurs)
|
|
RISC (Microprocesseurs)
|
|
COMPUTERS -- Hardware -- Personal Computers -- Macintosh.
|
|
COMPUTERS -- Hardware -- Personal Computers -- PCs.
|
|
Embedded computer systems -- Programming
|
|
MIPS (Computer architecture)
|
|
RISC microprocessors
|
| Genre/Form |
dissertations.
|
|
Academic theses
|
|
Academic theses.
|
|
Thèses et écrits académiques.
|
| Cover Title |
See MIPS run Linux |
| Other Form: |
Print version: Sweetman, Dominic. See MIPS run. 2nd ed. San Francisco, Calif. : Morgan Kaufmann Publishers/Elsevier, ©2007 9780120884216 0120884216 (DLC) 2006287016 (OCoLC)76835747 |
| ISBN |
9780120884216 |
|
0120884216 |
|
9780080525235 (electronic bk.) |
|
0080525237 (electronic bk.) |
| Standard No. |
(WaSeSS)ssj0000243356 |
|
AU@ 000048753257 |
|
AU@ 000050492501 |
|
AU@ 000051559085 |
|
AU@ 000051860632 |
|
AU@ 000059268268 |
|
CHBIS 005829005 |
|
CHNEW 001005535 |
|
CHVBK 168568535 |
|
DEBBG BV039828822 |
|
DEBBG BV041119678 |
|
DEBBG BV042314149 |
|
DEBBG BV043043868 |
|
DEBSZ 275458466 |
|
DEBSZ 396675611 |
|
DEBSZ 422200182 |
|
NZ1 11778174 |
|
NZ1 14540185 |
|
NZ1 15177147 |
|
